Driveable area detection is a key component for various applications in the\nfield of autonomous driving (AD), such as ground-plane detection, obstacle\ndetection and maneuver planning. Additionally, bulky and over-parameterized\nnetworks can be easily forgone and replaced with smaller networks for faster\ninference on embedded systems. The driveable area detection, posed as a two\nclass segmentation task, can be efficiently modeled with slim binary networks.\nThis paper proposes a novel binarized driveable area detection network (binary\nDAD-Net), which uses only binary weights and activations in the encoder, the\nbottleneck, and the decoder part. The latent space of the bottleneck is\nefficiently increased (x32 -> x16 downsampling) through binary dilated\nconvolutions, learning more complex features. Along with automatically\ngenerated training data, the binary DAD-Net outperforms state-of-the-art\nsemantic segmentation networks on public datasets. In comparison to a\nfull-precision model, our approach has a x14.3 reduced compute complexity on an\nFPGA and it requires only 0.9MB memory resources. Therefore, commodity\nSIMD-based AD-hardware is capable of accelerating the binary DAD-Net.\n