True Random Number Generation using Latency Variations of Commercial\n MRAM Chips

The emerging magneto-resistive RAM (MRAM) has considerable potential to\nbecome a universal memory technology because of its several advantages:\nunlimited endurance, lower read/write latency, ultralow-power operation,\nhigh-density, and CMOS compatibility, etc. This paper will demonstrate an\neffective technique to generate random numbers from energy-efficient\nconsumer-off-the-shelf (COTS) MRAM chips. In the proposed scheme, the inherent\n(intrinsic/extrinsic process variation) stochastic switching behavior of\nmagnetic tunnel junctions (MTJs) is exploited by manipulating the write latency\nof COTS MRAM chips. This is the first system-level experimental implementation\nof true random number generator (TRNG) using COTS toggle MRAM technology to the\nbest of our knowledge. The experimental results and subsequent NIST SP-800-22\nsuite test reveal that the proposed latency-based TRNG is acceptably fast (~22\nMbit/s in the worst case) and robust over a wide range of operating conditions.\n

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