FlexiCore-DNN: A Configurable and Templated Architecture for End-to-End FPGA Acceleration of Deep Neural Networks

With the development of artificial intelligence technology, there are many challenges in achieving end-to-end automated deployment of deep neural networks (DNN) on Field Programmable Gate Arrays (FPGA), such as long development cycles and insufficient flexibility in hardware design. This paper introduces FlexiCore-DNN, an extensible, high-performance, and flexible digital hardware architecture designed to overcome these challenges. To support this architecture, we have designed and implemented a library of accelerator template that contains a set of foundational hardware architecture templates alongside a diverse range of operator accelerators. This template is described at the Verilog RTL level, featuring high versatility and scalability, and is designed with different hardware architectures for FPGA with and without CPU hard cores. Experimental results show that on Zynq platform, our architecture achieves 158 GOPS and 40.84GOPS/W at 150MHz, demonstrating its advantages in terms of performance and energy efficiency.