As an application of TI's latest multi-core DSP chip TMS320C6678 and Xilinx's FPGA chip XC5VLX110T, This paper designed and implemented a dual-DSP and FPGA real-time image processing system based on the Serial Rapid IO (SRIO), Hyperlink and reconfigurable technology. It used TMS320C6678 on-chip SRIO and Hyperlink interface module, XC5VLX110T on-chip Rocket IO modules, reconfigurable technology to implement a DSP and FPGA loosely coupled parallel interconnection reconfigurable system. on Embedded operating system's DSP / BIOS architecture, this paper implemented the program of hardware driver of bottom layer and the corresponding data transfer procedures, and also completed the transmission of digital images.
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A Design of Versatile Image Processing Platform Based on the Dual Multi-core DSP and FPGA
Semantic Scholar · Computer Science · 2012
Abstract
As an application of TI's latest multi-core DSP chip TMS320C6678 and Xilinx's FPGA chip XC5VLX110T, This paper designed and implemented a dual-DSP and FPGA real-time image processing system based on the Serial Rapid IO (SRIO), Hyperlink and reconfigurable technology. It used TMS320C6678 on-chip SRIO and Hyperlink interface module, XC5VLX110T on-chip Rocket IO modules, reconfigurable technology to implement a DSP and FPGA loosely coupled parallel interconnection reconfigurable system. on Embedded operating system's DSP / BIOS architecture, this paper implemented the program of hardware driver of bottom layer and the corresponding data transfer procedures, and also completed the transmission of digital images.