Power to the Model: Generating Energy-Aware Mixed-Signal Models using Machine Learning

Abstract

Power consumption is a major concern in todays System-on-Chip (SoC) design and verification. While functional verification on system-level has recently be pushed to higher levels of abstraction using behavioral models, verifying power consumption still relies on time-consuming low-level simulations. The reason is that manually written models of Analog/Mixed-Signal (AMS) blocks and IP cores usually do not include transient power information because of the complex dependency that has to be captured for modeling it. This paper presents a novel methodology for augmenting purely functional models of AMS blocks with information about their transient power consumption without manual interaction. This is realized through machine learning from simulations of the corresponding transistor-level representation. A feed forward time delay neural network (TDNN) is trained and afterwards automatically translated into a behavioral modeling language that is compatible to industrial circuit simulators. The applicability of our approach is presented in a case study.