Some recent analog CAD tools include simulation-based circuit synthesizers that use evolutionary algorithms to find optimal circuit sizes. One important problem is the long execution time due to high number of simulations. This paper suggests the use of neural networks to determine circuit performance instead of simulations, which reduces execution time significantly. In our simulation-based circuit synthesizer, the data produced by preceding generations are not discarded as in conventional algorithms; they are used to train artificial neural networks inside the optimization loop. The simulator is then replaced by neural networks to estimate performance parameters. Up to 64.8% reduction in execution time (2.8x speed-up) was obtained with the proposed method.
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Artificial Neural Network Assisted Analog IC Sizing Tool
Semantic Scholar · Engineering · 2019
Abstract
Some recent analog CAD tools include simulation-based circuit synthesizers that use evolutionary algorithms to find optimal circuit sizes. One important problem is the long execution time due to high number of simulations. This paper suggests the use of neural networks to determine circuit performance instead of simulations, which reduces execution time significantly. In our simulation-based circuit synthesizer, the data produced by preceding generations are not discarded as in conventional algorithms; they are used to train artificial neural networks inside the optimization loop. The simulator is then replaced by neural networks to estimate performance parameters. Up to 64.8% reduction in execution time (2.8x speed-up) was obtained with the proposed method.