An Improved RRAM-Based Binarized Neural Network With High Variation-Tolerated Forward/Backward Propagation Module
Binarized neural network (BNN) enables resistive switching random access memory (RRAM) with high nonlinearity and nonsymmetry to realize online training, using an RRAM & comparator structure. In this work, a new hardware implementation approach is proposed to improve the efficiency of BNN. In the approach, an 1T1R array-based propagation module is introduced and designed to realize the computing acceleration of fully parallel vector–matrix multiplication (VMM) in both forward and backward propagations. Using the 1T1R-based propagation module, high computing efficiency is achieved in both training and inference tasks, improving by <inline-formula> <tex-math notation="LaTeX">$50\times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$177\times $ </tex-math></inline-formula>, respectively. To solve the computation error caused by device variation, a novel operation scheme with low gate voltage is proposed. With the operation scheme, the RRAM variation is dramatically suppressed by 74.8% for cycle-to-cycle and 59.9% for device-to-device. It enables high-accuracy VMM calculation and, therefore, achieves 94.7% accuracy with a typical BNN, showing only 0.7% degradation from the ideal variation-free case.
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An Improved RRAM-Based Binarized Neural Network With High Variation-Tolerated Forward/Backward Propagation Module
Semantic Scholar · Engineering · 2020
Abstract
Binarized neural network (BNN) enables resistive switching random access memory (RRAM) with high nonlinearity and nonsymmetry to realize online training, using an RRAM & comparator structure. In this work, a new hardware implementation approach is proposed to improve the efficiency of BNN. In the approach, an 1T1R array-based propagation module is introduced and designed to realize the computing acceleration of fully parallel vector–matrix multiplication (VMM) in both forward and backward propagations. Using the 1T1R-based propagation module, high computing efficiency is achieved in both training and inference tasks, improving by <inline-formula> <tex-math notation="LaTeX">$50\times $ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$177\times $ </tex-math></inline-formula>, respectively. To solve the computation error caused by device variation, a novel operation scheme with low gate voltage is proposed. With the operation scheme, the RRAM variation is dramatically suppressed by 74.8% for cycle-to-cycle and 59.9% for device-to-device. It enables high-accuracy VMM calculation and, therefore, achieves 94.7% accuracy with a typical BNN, showing only 0.7% degradation from the ideal variation-free case.