001 FPGA implementation of multi-anchor quasi-reflective learning-based artificial Protozoan optimizer for path planning OpenAlex Paper Jeng‐Shyang Pan, Ao Gan et al. 6 days ago 002 AIEAnalyzer: An Analytical Framework for Versal AI Engine Performance Analysis OpenAlex Paper Xinya Luan, Zhe Lin et al. Jul 23 003 Hardware Explained for Generative AI OpenAlex Paper Victor Perez Jul 23 004 A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference OpenAlex Paper Amirhossein Zarei, Shervin Vakili Jul 21 005 Versat-AI: An ONNX-to-SoC Compiler for Model-Agnostic CGRA Edge Inference OpenAlex Paper Rúben Teixeira, João Barreiros Rodrigues et al. Jul 20 006 SparseMap: A Sparse CNN Mapping Framework Tailored for Streaming Coarse-grained Reconfigurable Array OpenAlex Paper Xiaobing Ni, Mengke Ge et al. Jul 17 007 TetraNet: Power-of-Two Quaternary Weights for Small Decoder-Only Language Models OpenAlex Paper Abhishek Shinde Jul 17 008 TetraNet: Power-of-Two Quaternary Weights for Small Decoder-Only Language Models OpenAlex Paper Abhishek Shinde Jul 17 009 Deterministic Semantic Layered Orchestration (DSLO): Field Definition v1.0 OpenAlex Paper Donald Slowicki Jul 12 010 Deterministic Semantic Layered Orchestration (DSLO): Field Definition v1.0 OpenAlex Paper Donald Slowicki Jul 12 011 IRONSmith: A Visual Dataflow Design Environment for AMD Ryzen AI NPUs OpenAlex Paper Brock Sorenson, Samer Ali et al. Jul 12 012 Deterministic Semantic Layered Orchestration (DSLO): Field Definition v1.0 OpenAlex Paper Donald Slowicki Jul 10 013 Deterministic Semantic Layered Orchestration (DSLO): Field Definition v1.0 OpenAlex Paper Donald Slowicki Jul 10 014 Integrating AutoML and FPGA Deployment: A Pipeline for Model Selection and Hardware-Aware Implementation OpenAlex Paper Yryskeldi Siddi, Giorgio Delzanno et al. Jul 10 015 MxGLUT: A Reconfigurable LUT-Centric Broadcast Dataflow Accelerator for Mixed-Precision GEMM OpenAlex Paper Weiyu Zhou, Chen Ding et al. Jul 2 016 High‐Performance <scp>GPU</scp> Techniques for <scp>2D</scp> Convolution Operators in Deep Neural Networks OpenAlex Paper Hui Wei, Enjie Liu et al. Jul 1 017 A unified Big-O–based framework for comparative complexity analysis of CNN and Transformer architectures OpenAlex Paper Peerapol Khunarsa, Pafan Doungpaisan Jun 30 018 Sustainable Generative AI Acceleration Using FPGA-Based Autoencoder Architecture OpenAlex Paper S. Saravanan, M. Lavanya et al. Jun 22 019 FaStrA: Fast and Efficient Network Structure-Aware Layer Fusion on Deep Learning Accelerators OpenAlex Paper Jung‐Woo Choi, Woohyun Joo et al. Jun 18 020 GUPrecision: Group-Wise Uniform Precision Accelerator for Depthwise Separable Convolution using Hardware-Algorithm Co-Design OpenAlex Paper Yuehua Chen, Jie Lou et al. Jun 18 021 Hardware-Early-in-the-Loop for Edge AI OpenAlex Paper Isaac Arnold, Na Gong Jun 18 022 HoloLUT: An Efficient LUT-Based Engine via Holistic Data Processing for Low-bit LLM Inference OpenAlex Paper Hui Wang, W. Ma et al. Jun 18 023 Mixed-precision Neural Networks on RISC-V CPU with Reconfigurable SIMD Instruction Extension via eFPGA OpenAlex Paper Zixin Yang, Yanze Li et al. Jun 18 024 PoSVM: Posit-Based Accelerator for SVM-driven Edge Biomedical Image Classification OpenAlex Paper M. Arun, Mihir S Kagalkar et al. Jun 18 025 TLG2LUT6: Threshold Logic Mapping for Sub-Nanosecond Binary Neural Network Inference OpenAlex Paper Abdullah Sahruri, Martin Margala Jun 18 026 μ-ORCA: Optimizing Acceleration for Microsecond-Scale Deep Neural Network Inference on ACAP OpenAlex Paper Shixin Ji, Jinming Zhuang et al. Jun 18 027 Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs OpenAlex Paper David Peter Federl, Lukas Einhaus et al. Jun 15 028 Architektura Obliczeniowa Wszechświata: Rejestry Czasu, Dioda Informacyjna i Ewolucja Praw Fizyki OpenAlex Paper Grzegorz Szczerba Jun 12 029 Architektura Obliczeniowa Wszechświata: Rejestry Czasu, Dioda Informacyjna i Ewolucja Praw Fizyki OpenAlex Paper Grzegorz Szczerba Jun 12 030 Hardware-Aware Co-Design Framework for Efficient TinyML Deployment on Ultra-Low-Power Edge Devices OpenAlex Paper Promita Chakraborty, Debapriya Sengupta et al. Jun 12 031 Hardware-Aware Co-Design Framework for Efficient TinyML Deployment on Ultra-Low-Power Edge Devices OpenAlex Paper Promita Chakraborty, Debapriya Sengupta et al. Jun 12 032 Time-Triggered Organic Computing OpenAlex Paper Mario Qosja Jun 10 033 NPUMeter: Automatic Operator Optimization for Ascend NPU with Accurate Analytical Performance Models OpenAlex Paper Weichuang Zhang, Yufei Shangguan et al. Jun 9 034 Design and hardware implementation of a robust deep vision-based FSO-PAT system OpenAlex Paper Erfan Kohantorabi, Mohammad Ali Amirabadi Jun 8 035 Spectral_Computing_Product_Pitch_v2.docx OpenAlex Paper Timothy Desmond Jun 7 036 Spectral_Computing_Product_Pitch_v2.docx OpenAlex Paper Timothy Desmond Jun 7 037 Design and Development of an AI-Powered Code Generation System with Persistent Memory and Multi-Agent Architecture OpenAlex Paper Vijayalaxmi Biradar, Krishna Dhikale et al. Jun 1 038 Layer-specific parallelization for FPGA-based convolutional neural network accelerators: Performance and resource evaluation OpenAlex Paper Mustafa Tasci, Ayhan Istanbullu Jun 1 039 OpenEye: A Scalable Open-Source Hardware Accelerator for DNNs OpenAlex Paper Denis Lebold, Hendrik Wöhrle May 31 040 elasticAI.explorer: Towards a Unified End-to-End Framework for Hardware-Aware Neural Architecture Search OpenAlex Paper Natalie Maman, Florian Hettstedt et al. May 28 041 Persistent Structural Signatures - Adaptive Structural Identity Profiles in Living Computational Systems OpenAlex Paper Rafael Felippe VOIGT May 27 042 Persistent Structural Signatures - Adaptive Structural Identity Profiles in Living Computational Systems OpenAlex Paper Rafael Felippe VOIGT May 27 043 Hardware-Accelerated 3D LiDAR-Based Object Detection with BEV Spatial Mapping on Embedded FPGA Platforms OpenAlex Paper Güner Tatar, Mahmud Esad Arar May 25 044 Review of FPGA Hardware Acceleration and Co-optimisation of Hardware and Software for Artificial Intelligence OpenAlex Paper Suyao Wang May 25 045 Migration Design Pattern Catalog (DPC) Context-Indexed Functor Migration Architecture OpenAlex Paper John Harby May 21 046 Migration Design Pattern Catalog (DPC) Context-Indexed Functor Migration Architecture OpenAlex Paper John Harby May 21 047 Deploy Low-Latency Convolutional Neural Networks for Autonomous Embedded Applications: Real-Time Object Recognition on AI-Integrated Microprocessors OpenAlex Paper T. S. Balaji, Ali Hussein Ali Abu Zaidline et al. May 20 048 Accuracy-Performance-Resources Trade-Offs in RISC-V Microarchitectures for Genetic Programming OpenAlex Paper Paul Allaire, Mickaël Dardaillon et al. May 19 049 HMix : An Efficient Hardware Accelerator for Quantized MLP-Mixer Inference OpenAlex Paper Dhananjay Rao Thallikar Shyam, Shashank Nag et al. May 19 050 VES-Based Computer OpenAlex Paper Mikheil Rusishvili May 19 051 VES-Based Computer OpenAlex Paper Mikheil Rusishvili May 19 052 Designing Energy Efficient Accelerators Through Neural Architecture Search OpenAlex Paper Ziyu Yan May 18 053 Evolution-aware specification-driven synthesis of intelligent monitoring systems by large language models OpenAlex Paper V.Y. Lyashkevych May 18 054 μ-ORCA: Optimizing Acceleration for Microsecond-Scale Deep Neural Network Inference on ACAP OpenAlex Paper Shixin Ji, Jinming Zhuang et al. May 17 055 AIR-SR v2: A Semantic Runtime Architecture for Token-Efficient LLM Code Generation OpenAlex Paper Masoomul Haque Choudhury May 14 056 Reconfigurable Computing Challenge: Deploying SmolVLA Model on an AMD XDNA NPU OpenAlex Paper Xiaoyu Liang, Elaine Cao et al. May 13 057 VSALUT: A Lightweight Low-Dimensional VSA Classifier for Efficient Inference on FPGA OpenAlex Paper Nuntipat Narkthong, Xiaolin Xu May 13 058 Lightweight Deep Learning Architectures for Edge Intelligence: Budget-Aware Compression–Architecture Co-Design OpenAlex Paper Mohammad Al Khaldy, Ziadoon Otaiwi et al. May 12 059 Unleashing Scalable Context Parallelism for Foundation Models Pre-Training via FCP OpenAlex Paper Yilong Zhao, Xiaonan Nie et al. May 8 060 FPGA-Based AI Accelerator for Real-Time Voice Command Recognition Using TinyML for Smart Home Applications OpenAlex Paper Nikam Pawan Anil, Rane Digamber Bhasker et al. May 1