BUS REVERSIBLE ORTHOGONAL DIFFERENTIAL VECTOR SIGNALING CODES

Patent №

US 10,003,424

Granted

2018-06-19

Filed 2016

Owner

KANDOU LABS, S.A.

Lab

—

AI components

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15251912

Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical reordering of received signals or other significant duplication of receiver resources.

AI hardwareH04L 27/2602G06F 9/30036G06F 13/4282G06F 17/10H04B 3/50H04J 11/00H04L 1/0668

Google Patents

AI classification

AI hardware1.00

Evolutionary computation0.08

Knowledge representation0.01

Natural language0.01

Speech0.00

Vision0.00

Machine learning0.00

Planning0.00

Ownership

KANDOU LABS, S.A.

assignment · 418740809

Assignors

SHOKROLLAHI, AMIN, ULRICH, ROGER

On an employer assignment, the assignors are typically the inventors.

From the same owner

AMPLIFIER WITH ADJUSTABLE HIGH-FREQUENCY GAIN USING VARACTOR DIODESUS 11,502,658 · 2022 LOW POWER CHIP-TO-CHIP BIDIRECTIONAL COMMUNICATIONSUS 11,477,055 · 2022 SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATORUS 11,469,931 · 2022 DYNAMICALLY WEIGHTED EXCLUSIVE OR GATE HAVING WEIGHTED OUTPUT SEGMENTS FOR PHASE DETECTION AND PHASE INTERPOLATIONUS 11,362,800 · 2022 PASSIVE MULTI-INPUT COMPARATOR FOR ORTHOGONAL CODES ON A MULTI-WIRE BUSUS 11,159,350 · 2021 SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATORUS 11,063,799 · 2021 MULTIPHASE DATA RECEIVER WITH DISTRIBUTED DFEUS 11,036,672 · 2021 LOW POWER CHIP-TO-CHIP BIDIRECTIONAL COMMUNICATIONSUS 11,032,110 · 2021

Cites (51)

Orthogonal Differential Vector Signaling Codes with Embedded ClockUS 9,461,862 · 2016 Bus Reversable Orthogonal Differential Vector Signaling CodesUS 9,432,082 · 2016 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPROVING MEMORY SYSTEMSUS 9,432,298 · 2016 Clock-Embedded Vector Signaling CodesUS 9,363,114 · 2016 CIRCUITS FOR EFFICIENT DETECTION OF VECTOR SIGNALING CODES FOR CHIP-TO-CHIP COMMUNICATION USING SUMS OF DIFFERENCESUS 9,288,082 · 2016 REDUCING ELECTROMAGNETIC RADIATION EMITTED FROM HIGH-SPEED INTERCONNECTSUS 9,172,412 · 2015 METHODS AND SYSTEMS FOR ERROR DETECTION AND CORRECTION USING VECTOR SIGNAL PREDICTIONUS 9,083,576 · 2015 MULTIPLY ACCUMULATE OPERATIONS IN THE ANALOG DOMAINUS 9,069,995 · 2015 COMMUNICATIONS SYSTEM USING BEAMFORMINGUS 9,020,049 · 2015 POWER AND PIN EFFICIENT CHIP-TO-CHIP COMMUNICATIONS WITH COMMON-MODE REJECTION AND SSO RESILIENCEUS 9,015,566 · 2015 CROSSBAR SWITCH DECODER FOR VECTOR SIGNALING CODESUS 8,989,317 · 2015 ANTIPODAL-MAPPING-BASED ENCODERS AND DECODERSUS 8,949,693 · 2015 NOTIFYING A CONTROLLER OF A CHANGE TO A PACKET FORWARDING CONFIGURATION OF A NETWORK ELEMENT OVER A COMMUNICATION CHANNELUS 8,897,134 · 2014 PARALLEL DATA COMMUNICATIONS MECHANISM HAVING REDUCED POWER CONTINUOUSLY CALIBRATED LINESUS 8,898,504 · 2014 ANTIPODAL DEMODULATION METHOD AND ANTIPODAL DEMODULATOR FOR NON-COHERENT UNITARY SPACE-TIME MODULATION IN MIMO WIRELESS COMMUNICATIONUS 8,879,660 · 2014 FINITE STATE ENCODERS AND DECODERS FOR VECTOR SIGNALING CODESUS 8,718,184 · 2014 METHODS AND SYSTEMS FOR NOISE RESILIENT, PIN-EFFICIENT AND LOW POWER COMMUNICATIONS WITH SPARSE SIGNALING CODESUS 8,649,445 · 2014 MULTI-MODAL OBJECT SIGNATUREUS 8,649,556 · 2014 CHARGE SHARING ANALOG COMPUTATION CIRCUITRY AND APPLICATIONSUS 8,547,272 · 2013 DEVICE FOR EXCHANGING DATA BETWEEN COMPONENTS OF AN INTEGRATED CIRCUITUS 8,520,493 · 2013 RANK MODULATION FOR FLASH MEMORIESUS 8,245,094 · 2012 VIDEO CODING WITH FINE GRANULARITY SCALABILITY USING CYCLE-ALIGNED FRAGMENTSUS 8,233,544 · 2012 METHOD AND APPARATUS OF ENCODING AND DECODING DATA USING LOW DENSITY PARITY CHECK CODE IN A WIRELESS COMMUNICATION SYSTEMUS 8,185,807 · 2012 DESIGN OF SPHERICAL LATTICE CODES FOR LATTICE AND LATTICE-REDUCTION-AIDED DECODERSUS 8,091,006 · 2012 BUS ENCODING/DECODING METHOD AND BUS ENCODER/DECODERUS 8,085,172 · 2011

and 26 more

Related research

CRC-Aided Short Convolutional Codes and RCU Bounds for Orthogonal SignalingarXiv Quasi-OSD of Binary Image of RS Codes with Applications to JSCCOpenAlex Peterson–Gorenstein–Zierler algorithm for differential convolutional codesarXiv Convolutional Codes with Optimum Bidirectional Distance ProfilearXiv Braided Convolutional Self-orthogonal Codes with Double Sliding Window DecodingSemantic Scholar

Full text

Google Patents