Patent №
US 10,073,779
Granted
2018-09-11
Filed 2012
Owner
INTEL CORPORATION
Lab
—
AI components
2
planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13729579
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
AI classification
Ownership
INTEL CORPORATION
assignment · 301140247
Assignors
HUM, HERBERT H., GANESH, BRINDA, VASH, JAMES R., KUMAR, GANESH, PUTHIYEDATH, LEENA K., ERLANGER, SCOTT J., DEHAEMER, ERIC J., MOGA, ADRIAN C, SEBOT, MICHELLE M., CARLSON, RICHARD L., BUBIEN, DAVID, DELANO, ERIC
On an employer assignment, the assignors are typically the inventors.