Methods And Devices for Reducing Program Disturb in Non-Volatile Memory Cell Arrays

Patent №

US 10,074,438

Granted

2018-09-11

Filed 2016

Owner

CYPRESS SEMICONDUCTOR CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15279194

A memory device that includes a pair of non-volatile memory cells, a first memory cell including a first memory gate and a first select gate, and a second memory cell including a second memory gate and a second select gate. The first and second memory cells share a source line, and the first and second memory gates are not connected to one another.

AI hardwareG11C 16/3427G11C 16/0466G11C 16/10H10B 43/10H10B 43/35H10D 30/691H10D 30/696H10W 20/42

AI classification

AI hardware0.89
Knowledge representation0.04
Natural language0.01
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Speech0.00
Planning0.00

Ownership

CYPRESS SEMICONDUCTOR CORPORATION

assignment · 421700460

Assignors

GIVANT, AMICHAI

On an employer assignment, the assignors are typically the inventors.

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