PHASED BASED DISTRIBUTED LRU FOR SHARED CACHE SYSTEMS

Patent №

US 10,102,147

Granted

2018-10-16

Filed 2016

Owner

EMC CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15188006

In a system in which a plurality of computing elements share a cache, each computing element owns a stripe of the cache. Each stripe contains cache objects that are accessible to all computing elements but managed only by the owning computing element. Each computing element maintains an LRU FIFO queue in local memory for the cache objects owned by that computing element. Each computing element also maintains a separate hash table in local memory for each other computing element. The hash tables indicate access to cache objects that are owned by those other computing elements. Each computing element updates its LRU FIFO queue when it accesses cache objects that it owns. The hash tables are periodically distributed by all computing elements via RDMA so that the LRU FIFO queues of all computing elements can be updated based on accesses to owned cache objects by other non-owner computing elements.

AI hardwareG06F 12/123G06F 12/0811G06F 12/084G06F 12/0842G06F 12/128G06F 2212/1041G06F 2212/281G06F 2212/313

AI classification

AI hardware0.78
Vision0.00
Machine learning0.00
Knowledge representation0.00
Speech0.00
Evolutionary computation0.00
Natural language0.00
Planning0.00

Ownership

EMC CORPORATION

assignment · 389710334

Assignors

BENHANOKH, GABRIEL, CHANLER, ANDREW, SHVAIGER, FELIX, TANG, HONGLIANG, DON, ARIEH

On an employer assignment, the assignors are typically the inventors.

From the same owner

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