STORING RUN-LENGTH LIMITED TWO-DIMENSIONAL ENCODED BIT PATTERNS IN MEMORY ARRAYS

Patent №

US 10,102,205

Granted

2018-10-16

Filed 2016

Owner

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15111703

In one implementation, a data storage system includes a memory array having memory devices in a crossbar configuration, and a memory controller for controlling data storage in the memory array. The memory controller includes an encoder to generate a 2-dimensional encoded bit pattern that encodes an input data. Each run-length of 0's and each run-length of 1's in each row or each column of the encoded bit pattern are at least of a predefined lower limit. The predefined lower limit is at least two. The memory controller includes a write controller to write the encoded bit pattern into the memory devices of the memory array, such that a number of consecutive memory devices in each row or each column of the memory array having a same state is based on the encoded bit pattern.

AI hardwareG06F 16/00G06F 3/0604G06F 3/0638G06F 3/0679G11C 13/0007G11C 13/004G11C 13/0069

AI classification

AI hardware0.82
Knowledge representation0.04
Vision0.02
Machine learning0.01
Evolutionary computation0.00
Speech0.00
Natural language0.00
Planning0.00

Ownership

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

assignment · 403900444

HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

assignment · 406640001

Assignors

ORDENTLICH, ERIK, ROTH, RON M.

On an employer assignment, the assignors are typically the inventors.

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