METHOD AND APPARATUS FOR PINNING MEMORY PAGES IN A MULTI-LEVEL SYSTEM MEMORY

Patent №

US 10,185,501

Granted

2019-01-22

Filed 2015

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14865571

An apparatus is described. The apparatus includes a memory controller to interface with a multi-level system memory. The memory controller includes a pinning engine to pin a memory page into a first level of the system memory that is at a higher level than a second level of the system memory.

AI hardwareG06F 3/0613G06F 3/0604G06F 3/0631G06F 3/0638G06F 3/0685G06F 12/0802G06F 12/0804G06F 12/0866+3 more

AI classification

AI hardware0.90
Natural language0.00
Planning0.00
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Speech0.00

Ownership

INTEL CORPORATION

assignment · 375440316

Assignors

ANANTARAMAN, ARAVINDH V., FANNING, BLAISE

On an employer assignment, the assignors are typically the inventors.

From the same owner

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