COMPILER OPTIMIZATION TO REDUCE THE CONTROL FLOW DIVERGENCE

Patent №

US 10,242,419

Granted

2019-03-26

Filed 2015

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14843698

In one embodiment a graphics processing system comprises a graphics processor having execution logic and shared memory and a shader compiler unit to compile a shader program for execution by the execution logic of the graphic processor, wherein the shader is to optimize the shader program during the compile, wherein to optimize the shader program includes to convert a divergent block of parallel instructions into a divergent block and a non-divergent block of instructions.

AI hardwareG06T 1/20G06T 1/60

AI classification

AI hardware1.00
Vision0.00
Evolutionary computation0.00
Speech0.00
Planning0.00
Natural language0.00
Knowledge representation0.00
Machine learning0.00

Ownership

INTEL CORPORATION

assignment · 364820169

Assignors

SATHE, RAHUL P

On an employer assignment, the assignors are typically the inventors.

From the same owner

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