EFFICIENT RANGE-BASED MEMORY WRITEBACK TO IMPROVE HOST TO DEVICE COMMMUNICATION FOR OPTIMAL POWER AND PERFORMANCE

Method and apparatus for efficient range-based memory write back is described herein. One embodiment of an apparatus includes a system memory, a plurality of hardware processor cores each of which includes a first cache, a decoder circuitry to decode an instruction having fields for a first memory address and a range indicator, and an execution circuitry to execute the decoded instruction. Together, the first memory address and the range indicator define a contiguous region in the system memory that includes one or more cache lines. An execution of the decoded instruction causes any instances of the one or more cache lines in the first cache to be invalidated. Additionally, any invalidated instances of the one or more cache lines that are dirty are to be stored to system memory.