METHOD AND SYSTEM FOR VERIFICATION USING COMBINED VERIFICATION DATA

Patent №

US 10,586,014

Granted

2020-03-10

Filed 2018

Owner

CADENCE DESIGN SYSTEMS, INC.

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15915365

A method for combining verification data may include using a processor, obtaining verification data and a verification model from each of a plurality of verification engines relating to different verification methods, the verification data relating to a plurality of verification tests that were conducted on a design under test (DUT) using the plurality of verification engines; using a processor, merging the verification models obtained from the plurality of verification engines into a merged verification model; using a processor, calculating a combined verification metric grade for a plurality of verification entities in the merged verification model using verification metric grades for each of the plurality of verification entities calculated from the verification data obtained from the plurality of engines and applying a combined verification metric grade rule; and outputting the combined verification metric grade via an output device.

PlanningAI hardwareG06F 30/398G06F 30/33G06F 30/3323G06F 30/39G06F 2111/04G06F 2111/20

AI classification

AI hardware0.94
Planning0.89
Knowledge representation0.20
Machine learning0.13
Vision0.05
Natural language0.01
Evolutionary computation0.00
Speech0.00

Ownership

CADENCE DESIGN SYSTEMS, INC.

assignment · 451710263

Assignors

KINDERMAN, YAEL, SPATAFORE, DAVID, SEGAL, NILI, YAGUDAYEV, YAN, REYNOLDS, VINCENT

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC