TECHNIQUES TO REDUCE READ-MODIFY-WRITE OVERHEAD IN HYBRID DRAM/NAND MEMORY

Patent №

US 10,762,000

Granted

2020-09-01

Filed 2017

Owner

SAMSUNG ELECTRONICS CO., LTD

Lab

AI components

3

ml · kr · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15662072

A method of choosing a cache line of a plurality of cache lines of data for eviction from a frontend memory, the method including assigning a baseline replacement score to each way of a plurality of ways of a cache, the ways respectively storing the cache lines, assigning a validity score to each way based on a degree of validity of the cache line stored in each way, assigning an eviction decision score to each way based on a function of the baseline replacement score for the way and the validity score for the way, and choosing a cache line of the way having a highest eviction decision score as the cache line for eviction.

Machine learningKnowledge representationAI hardwareG06F 12/121G06F 12/0868G06F 12/127G06F 13/16G06F 2212/1024G06F 2212/1041G06F 2212/214G06F 2212/6022+1 more

AI classification

Knowledge representation1.00
AI hardware0.90
Machine learning0.81
Evolutionary computation0.02
Planning0.01
Natural language0.00
Vision0.00
Speech0.00

Ownership

SAMSUNG ELECTRONICS CO., LTD

assignment · 431710768

Assignors

CHANG, MU-TIEN, NAM, HEEHYUN, KIM, YOUNGSIK, CHO, YOUNGJIN, NIU, DIMIN, ZHENG, HONGZHONG

On an employer assignment, the assignors are typically the inventors.

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