AUTOMATIC SIMULATION FAILURES ANALYSIS FLOW FOR FUNCTIONAL VERIFICATION

Patent №

US 10,769,332

Granted

2020-09-08

Filed 2018

Owner

HCL TECHNOLOGIES LIMITED

Lab

AI components

3

kr · planning · evo

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

16125841

Disclosed is a system and method for automatically diagnosing an error by performing failure analysis of functional simulation pertaining to a Design Under Verification (DUV) or System Under Verification (SUV). A prediction unit generates a set of expected output packets upon processing a set of input packets' copy. A comparison unit compares an actual output packet, from the set of actual output packets, with an expected output packet, from the set of expected output packets, corresponding to the actual output packet. When there is a mismatch, the actual output packet is compared with at least one subsequent expected output packet until the match is found. The diagnosing unit automatically diagnoses at least one of a packet drop error, an ordering error, an error in routing, by performing a systematic failure analysis and reports a diagnostic information and/or default diagnostic information associated with the error.

AI classification

Planning1.00
Knowledge representation0.73
Evolutionary computation0.71
AI hardware0.50
Natural language0.02
Machine learning0.00
Vision0.00
Speech0.00

Ownership

HCL TECHNOLOGIES LIMITED

assignment · 468590122

Assignors

MUTHIAH, MANICKAM, KRISHNAMOORTHY, SATHISH KUMAR

On an employer assignment, the assignors are typically the inventors.

From the same owner

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