Patent №
US 11,042,480
Granted
2021-06-22
Filed 2019
Owner
ARM LIMITED
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
16395897
A system, apparatus and method for secure functions and manipulating cache line data. The method includes generating cache block addresses from a subset of bits, i.e. tag bits, of a cache address and hashing the cache block addresses with one or more secure functions that use keys to generate secure indexes.
AI hardwareG06F 12/0864G06F 12/0891G06F 12/128H04L 9/003H04L 9/0891G06F 2212/1052H04L 9/0643H04L 9/0869
AI classification
AI hardware0.70
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00
Machine learning0.00
Speech0.00
Vision0.00
Planning0.00
Ownership
ARM LIMITED
assignment · 490140461
Assignors
SANDBERG, ANDREAS LARS, RAMRAKHYANI, PRAKASH S.
On an employer assignment, the assignors are typically the inventors.
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