METHOD AND APPARATUS FOR ANALYZING SEMICONDUCTOR WAFER

The present invention provides a method and apparatus for analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested. The method comprises: obtaining a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested; establishing a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane.