Patent №
US 11,289,162
Granted
2022-03-29
Filed 2020
Owner
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
16862997
An analog content addressable memory cell includes a match line, a high side, and a low side. The high side encodes a high bound on a range of values and includes a first three terminal memory device. The first three terminal memory device includes a first gate that sets a high voltage bound of the first three terminal memory device. Specifically, an input voltage applied at the first gate of the first memory device, if higher than the high voltage bound, turns the first memory device ON which discharges the match line. Similarly, the low side encodes a lower bound on a range of values and includes a second three terminal memory device. The second three terminal memory device includes a second gate that sets a low voltage bound of the second three terminal memory device. Specifically, an input voltage applied at the second gate of the second memory device, if lower than the low voltage bound, turns the first memory device ON which discharges the match line.
AI classification
Ownership
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
assignment · 529750522
Assignors
STRACHAN, JOHN PAUL, GRAVES, CATHERINE, LI, CAN
On an employer assignment, the assignors are typically the inventors.