RE-ASSEMBLY MIDDLEWARE IN FPGA FOR PROCESSING TCP SEGMENTS INTO APPLICATION LAYER MESSAGES

Patent №

US 11,611,638

Granted

2023-03-21

Filed 2021

Owner

TATA CONSULTANCY SERVICES LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

17207786

A method and system of a re-assembly middleware in FPGA for processing TCP segments into application layer messages is disclosed. In recent years, the communication speed in digital systems has increased drastically and thus has brought in a growing need to ensure a good/high performance from the FPGA services. The disclosure proposes a re-assembly middleware in the FPGA for processing TCP segments into application layer messages at a pre-defined frequency for a good/high performance. The pre-defined frequency is a high frequency performance feature of the re-assembly middleware, wherein the FPGA's implementation frequency is at atleast 300 MHz based on a memory optimization technique. The memory optimization technique includes several strategies such registering an output and slicing memories.

AI hardwareH04L 69/12H04L 49/9057H04L 69/166

AI classification

AI hardware0.99
Machine learning0.04
Natural language0.00
Planning0.00
Vision0.00
Knowledge representation0.00
Speech0.00
Evolutionary computation0.00

Ownership

TATA CONSULTANCY SERVICES LIMITED

assignment · 556630130

Assignors

SHAH, DHAVAL, PURANIK, SUNIL, NAMBIAR, MANOJ, BARVE, MAHESH, SHAIKH, ISHTIYAQUE

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC