SYSTEMS AND METHODS FOR SEMICONDUCTOR DEFECT-GUIDED BURN-IN AND SYSTEM LEVEL TESTS

Systems and methods for semiconductor defect-guided burn-in and system level tests (SLT) are configured to receive a plurality of inline defect part average testing (I-PAT) scores from an inline defect part average testing (I-PAT) subsystem, where the plurality of I-PAT scores is generated by the I-PAT subsystem based on semiconductor die data for a plurality of semiconductor dies, where the semiconductor die data includes characterization measurements for the plurality of semiconductor dies, where each I-PAT score of the plurality of I-PAT scores represents a defectivity determined by the I-PAT subsystem based on a characterization measurement of a corresponding semiconductor die of the plurality of semiconductor dies; apply one or more rules to the plurality of I-PAT scores during a dynamic decision-making process; and generate one or more defect-guided dispositions for at least one semiconductor die of the plurality of semiconductor dies based on the dynamic decision-making process.