MEMORY TAGGING FOR SIDE-CHANNEL DEFENSE, MEMORY SAFETY, AND SANDBOXING

Patent №

US 11,630,920

Granted

2023-04-18

Filed 2018

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

16024257

A system may use memory tagging for side-channel defense, memory safety, and sandboxing to reduce the likelihood of successful attacks. The system may include memory tagging circuitry to address existing and potential hardware and software architectures security vulnerabilities. The memory tagging circuitry may prevent memory pointers from being overwritten, prevent memory pointer manipulation (e.g., by adding values), and increase the granularity of memory tagging to include byte-level tagging in cache. The memory tagging circuitry may sandbox untrusted code by tagging portions of memory to indicate when the tagged portions of memory include contain a protected pointer. The memory tagging circuitry provides security features while enabling CPUs to continue using and benefiting from speculatively performing operations. By co-locating all tagging information at a cacheline granularity with its associated data, the processor has all the information needed to perform access control decisions immediately and non-speculatively, while maintaining high performance and cache coherency.

AI hardwareG06F 21/72G06F 12/0895G06F 12/1408G06F 12/1475G06F 21/53G06F 21/64G06F 21/73G06F 21/75+6 more

AI classification

AI hardware1.00
Planning0.20
Evolutionary computation0.06
Knowledge representation0.02
Machine learning0.00
Speech0.00
Vision0.00
Natural language0.00

Ownership

INTEL CORPORATION

assignment · 462430823

Assignors

DURHAM, DAVID M., LEMAY, MICHAEL, CHHABRA, SIDDHARTHA, CONG, KAI

On an employer assignment, the assignors are typically the inventors.

From the same owner

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