DETECTION OF FAULTS IN PERFORMANCE OF MICRO INSTRUCTIONS

Patent №

US 11,645,185

Granted

2023-05-09

Filed 2020

Owner

INTEL CORPORATION

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

17033272

Micro-architectural fault detectors are described. An example of storage mediums includes instructions for receiving one or more micro instructions for scheduling in a processor, the processor including one or more processing resources; and performing fault detection in performance of the one or more micro instructions utilizing one or more of a first idle canary detection mode, wherein the first mode includes assigning at least one component as an idle canary detector to perform a canary process with an expected outcome, and a second micro-architectural redundancy execution mode, wherein the second mode includes replicating a first micro instruction to generate micro instructions for performance by a set of processing resources.

PlanningG06F 9/3861G06F 11/3409G06F 9/3836G06F 9/4868G06F 11/0721G06F 11/0751G06F 11/0772G06F 11/1497+3 more

AI classification

Planning0.63
AI hardware0.42
Evolutionary computation0.06
Natural language0.00
Knowledge representation0.00
Speech0.00
Machine learning0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 542160890

Assignors

ELBAUM, REUVEN, SHEN-ORR, CHAIM, ADMONI, ASSAF

On an employer assignment, the assignors are typically the inventors.

From the same owner

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