METHOD AND ARCHITECTURE FOR ACCELERATING DETERMINISTIC STOCHASTIC COMPUTING USING RESIDUE NUMBER SYSTEM

Inaccuracy of computations is an important challenge with the Stochastic Computing (SC) paradigm. Recently, deterministic approaches to SC are proposed to produce completely accurate results with SC circuits. Instead of random bit-streams, the computations are performed on structured deterministic bit-streams. However, current deterministic methods take a large number of clock cycles to produce correct result. This long processing time directly translates to very high energy consumption. This invention proposes a design methodology based on the Residue Number Systems (RNS) to mitigate the long processing time of the deterministic methods. Compared to the state-of-the-art deterministic methods of SC, the proposed approach delivers improvements in terms of processing time and energy consumption.