Patent US 3,988,580

An arrangement for applying the bits of a binary coded word to the inputs of respective ones of a first plurality of reiterative digital stores in a predetermined time sequence. A further means is provided for subsequently applying a code of parity bits for the said binary word to the inputs of respective ones of a second plurality of reiterative digital stores in a predetermined time sequence. And also there is a means for causing the word and parity bits to traverse their respective stores in the same sequence. As a result, the binary data can receive a dual check for correctness.