Patent US 4,067,058

The invention relates to a computer in which control means provide for high speed context switching. In a more specific aspect, the invention involves an arithmetic unit in which a workspace pointer register and control means operable on an interrupt store the contents of the workspace pointer in an element of a workspace in memory designated by the interrupt program and store in the workspace pointer register the address of the first element of the interrupt program workspace. A first register stores the address of a first element of a set of dedicated workspace elements in main memory. A second register stores the memory address of a current instruction of a problem program. A third register maintains current the status of execution of the problem program of which said instruction forms a part; and Workspace for the problem program is the set of workspace elements referenced by the contents of the first register, and upon occurrence of an interrupt, a new workspace is utilized to store the contents of the registers for the problem program permitting return to the problem program by shifting to the registers the contents stored in memory.