Patent US 4,091,378

An arrangement, particularly an analog-digital/digital-analog converter having a resistance line or chain, and a plurality of voltage comparators, each preferably comprising an insulator-layer, field-transistor and a load element in the form of a resistance, capacitor or diode, in which the control electrode terminal of each transistor forms a first comparator input, which is connected to a respective point on the resistance and with each cooperable load element being connected to one of the two remaining transistor terminals, one of which also simultaneously forms the output of such voltage comparator, and with the second comparator input for such voltage comparator being formed by the other transistor terminal. Preferably, the transistors are formed on a semiconductor substrate which has doped areas forming respective source and drain electrodes with the associated gate electrodes being disposed in insulated relation to the semiconductor substrate and formed of an electrical resistance material which serially interconnects the adjacent gate electrodes of the transistors, with one of the doped electrodes of each transistor comprising a respective part of a continuously doped area of the semiconductor substrate which thus forms a common terminal for all transistors, while the other doped electrode of each transistor extends outwardly away from such common terminal to form respective individual terminals. The invention also includes the method of operating such structures.