Patent US 4,200,930

In a digital data communication network there is provided a data communications subsystem working in conjunction with a main host system having a central host processor and main memory. The data communications subsystem provides a data communications processor and a local autonomous data communications memory connected to a basic control interface unit which supports a plurality of front-end controllers. The data communications subsystem can sense a halt in the main system and operate autonomously and independently of the main host system during such down-time. The present disclosure describes a front-end controller-processor called an adapter cluster module which is used to control a plurality of line adapters, each of which communicates with remote terminals on low to medium speed transmission lines. Up to 16 such adapter cluster modules may be accommodated as front-end controllers within a single data communications subsystem. Each adapter cluster module can handle up to eight transmission lines operating in full duplex mode. A ROM memory area is provided for standard program routines. A RAM memory is provided for storage of special routines and instructions in addition to a scratchpad area for accumulation of a full message block before any interruption is made to the data communications processor requesting further data transfer instructions. Thus, a large magnitude of overhead operations are removed from the data communications processor which formerly was interrupted each time a byte of information was received by the adapter cluster module.