Patent US 4,218,752

A one bit by N correlation digitally programmable filter comprising a multi-phase charge-transfer shift register whose phase are selectively clocked to achieve the programming. One phase is coupled to an integrator circuit that generates an output voltage proportional to the sum of the charged packets transferred. The clocking cycle is repeated sequentially to generate other selected summations. A plurality of correlators are utilized in parallel to perform an M bit by N correlation.