FOUR TERMINAL VOLTAGE TRIPLER FOR MONOLITHIC LCD CLOCK CIRCUIT

A voltage tripler for multiplying a DC voltage from a battery to provide a driving voltage for an LCD display in a digital clock. The circuit includes a charging capacitor and two storage capacitors and a plurality of switches for interconnecting the capacitors with the battery. The switches are controlled by means of driving circuitry which provides break-before-make type switching. The operation of the circuit is divided into four phases. During an initial phase the charging capacitor is charged to the voltage of the battery. During the second phase the charging capacitor is connected in parallel with one of the storage capacitors in order to transfer a portion of the charge to the storage capacitor. During the third phase the charging capacitor is again connected to the battery to recharge the charging capacitor. During the fourth phase, the charging capacitor is connected in parallel with the other storage capacitor so as to transfer charge to the storage capacitor. By repeating the sequence a plurality of times, the voltage on each of the storage capacitors will approach that of the battery. By referencing one of the capacitors to the negative terminal of the battery, the voltage at the free terminal of the other capacitor will be three times the battery voltage. This circuit is implemented on a monolithic integrated circuit and requires four terminals instead of five as in the prior art, thereby decreasing pin count and saving significant chip area.