Patent US 4,315,313

Diagnostic circuitry for use with the processor of a data processing system. The diagnostic circuitry includes a control register execution log for receiving control store addresses from a control register associated with an "EXECUTE+1" stage. A log pointer addresses the log when control store addresses are written into or read from the log. Test registers connected to the log and log pointer provide control store addresses and decrementing log addresses when the contents of the log are examined. One of the test registers is also used to hold a control store address for comparison with control store addresses of executing microinstructions, and when a match occurs, to generate a SYNC signal.