CHANNEL INTERFACE CIRCUIT WITH HIGH SPEED DATA MESSAGE HEADER FIELD TRANSLATION AND DIRECT MEMORY ACCESS

Patent №

US 4,424,565

Granted

1984-01-03

Filed 1981

Owner

BELL TELEPHONE LABORATORIES, INCORPORATED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06276074

The subject channel interface circuit functions in a multiprocessor environment to provide a high speed interface between a processor and the communication channel which interconnects all the processors. The communication channel carries data messages, which messages contain a header field specifying source, destination and control information. The subject channel interface circuit is programmable and serves to dynamically translate the header portion of the data message as it is received and thereby determine whether this data message is to be stored in the processor memory. If the data message is to be stored, the channel interface circuit immediately converts the header field into a hardware address, which is used to activate a specific location in processor memory. The data message is then inputted (via DMA) to this memory location and the appropriate buffer pointers are reset. Thus, the subject channel interface circuit performs all the data receiving tasks, including message storage and linking, without requiring the involvement of the associated processor.

AI hardwareG06F 15/167G06F 13/28G06F 15/161

AI classification

AI hardware0.77
Natural language0.01
Vision0.00
Speech0.00
Knowledge representation0.00
Machine learning0.00
Planning0.00
Evolutionary computation0.00

Ownership

BELL TELEPHONE LABORATORIES, INCORPORATED

assignment · 38960886

Assignors

LARSON, ALLEN L.

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC