Patent US 4,463,424

Patent №

US 4,463,424

Granted

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

06544331

Short traces of consecutive CPU references to storage are accumulated and processed to ascertain hit ratio as a function of cache size. From this determination, an allocation of cache can be made. Because this determination requires minimal processing time, LRU-referenceable memory space among concurrently executing sequential processes is used dynamically by a CPU cache manager.

AI hardwareG06F 12/123G06F 12/0842

AI classification

AI hardware0.99
Machine learning0.12
Natural language0.07
Knowledge representation0.07
Vision0.01
Speech0.01
Evolutionary computation0.00
Planning0.00
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