DUAL GATE CMOS TRANSISTOR CIRCUITS HAVING REDUCED ELECTRODE CAPACITANCE

Patent №

US 4,468,574

Granted

1984-08-28

Filed 1982

Owner

GENERAL ELECTRIC COMPANY, A CORP. OF

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06374586

Dual gate P-channel and N-channel transistors are interconnected in various configurations to provide logic circuits such as inverters, NAND gates, NOR gates, and Exclusive-OR gates.

Machine learningAI hardwareH03K 19/215H03K 19/0948H10D 84/859

AI classification

AI hardware1.00
Machine learning0.81
Natural language0.05
Evolutionary computation0.00
Knowledge representation0.00
Speech0.00
Vision0.00
Planning0.00

Ownership

GENERAL ELECTRIC COMPANY, A CORP. OF

assignment · 40010202

Assignors

ENGELER, WILLIAM E., MAZIN, MOSHE

On an employer assignment, the assignors are typically the inventors.

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