Patent №
US 4,601,007
Granted
1986-07-15
Filed 1984
Owner
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
+1 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
06573718
A full adder is constituted with complementary MOS FETs, wherein delay time of adding time and carry signal delay time are shortened as a result of reduced number of stages of signal processing gates.
AI hardwareG06F 7/5016
AI classification
AI hardware0.68
Machine learning0.09
Evolutionary computation0.04
Natural language0.01
Vision0.00
Planning0.00
Speech0.00
Knowledge representation0.00
Ownership
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
assignment · 42210613
NATIONS FINANCIAL CAPITAL CORPORATION AS SUCCESSOR AGENT
correct · 70940102
Assignors
UYA, MASARU, KANEKO, KATSUYUKI
On an employer assignment, the assignors are typically the inventors.
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