Patent №
US 4,620,179
Granted
1986-10-28
Filed 1985
Owner
—
Lab
—
AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
06771160
A method of successive approximation A/D conversion employing an N bit internal D/A converter and an N bit SAR is provided wherein the first X bits are approximated to within less than the desired accuracy for N bit successive approximation while the last Y bits are approximated to within at least the desired accuracy for N bit successive approximation. After the Xth bit approximation, the A/D converter may be allowed sufficient time to settle to within the desired accuracy for N bit approximation during an error correction stage which increments or decrements the digital signal for the first X bits.