FAILURE PROTECTION CIRCUIT FOR A COMMERCIAL MICROPROCESSOR

In conjunction with a commercial microprocessor controlled by a program stored in a ROM, a second microprocessor, similar to the first microprocessor, is connected into the system so as to operate similar to the first microprocessor. A four-phase clock steps the first microprocessor, then steps the second microprocessor, then compares the instruction registers of the two microprocessors and causes the instruction to be executed if an exact comparison is detected. If an exact comparison is not detected, the instruction is not executed.