FIELD STORAGE DRIVE IN INTERLINE TRANSFER CCD IMAGE SENSOR

A CCD image sensor includes a plurality of PN junction photodiodes aligned in a matrix fashion, and a plurality of CCD vertical shift registers of which each register element is associated with one of said plurality of PN junction photodiodes. A transfer gate is formed between the corresponding pair of CCD shift register element and the PN junction photodiode. The CCD image sensor does not have channel stoppers between the PN junction photodiodes. Register electrodes are made of upper register electrodes and lower register electrodes which are extended to portions provided between the adjacent two PN junction photodiodes. The upper register electrodes overlap the lower register electrodes at desired portions to achieve the shift operation in the CCD vertical shift registers. By properly controlling the clock pulses applied to the upper and lower register electrodes, electrical isolation is achieved between adjacent two PN junction photodiodes. At a timing when the charges stored in the PN junction photodiodes are transferred to the CCD vertical shift register, the clock pulse applied to the lower register electrodes bears three levels V.sub.L, V.sub.I and V.sub.H.