MICROPROGRAM CONTROLLER IN WHICH INSTRUCTION FOLLOWING CONDITIONAL BRANCH INSTRUCTION IS SELECTIVELY CONVERTED TO A NOP INSTRUCTION

Patent №

US 4,773,002

Granted

1988-09-20

Filed 1986

Owner

HITACHI, LTD., A CORP. OF JAPAN

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

06865388

In a microprogram controller by pipeline control which includes a memory for storing a microprogram and a program counter for representing the address of the memory, a microprogram controller includes means for judging whether or not a branch condition of a branch microinstruction is satisfied and means for converting the microinstruction fetched from the memory to a NOP (No Operation) microinstruction from the output of the next step of the memory till the outputs after a plurality of steps by the affirmation output of the judging means. When the affirmation output is obtained from the judging means, part of the memory output is loaded into the program counter and when the negation output is obtained, a value as the sum of a current value plus 1 is loaded into the program counter.

AI classification

AI hardware0.98
Knowledge representation0.26
Planning0.21
Natural language0.01
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

HITACHI, LTD., A CORP. OF JAPAN

assignment · 48600765

Assignors

IWASAKI, KAZUHIKO, YAMAGUCHI, NOBORU, FUNABASHI, TSUNEO, TATEZAKI, JUNICHI, SHIMURA, TAKANORI

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC