MULTIPLE DETECTOR VIEWING OF PIXELS USING PARALLEL TIME DELAY AND INTEGRATION CIRCUITRY

Patent №

US 4,779,005

Granted

1988-10-18

Filed 1987

Owner

IRVINE SENSORS CORPORATION, A CORP. OF CA

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07048551

A focal plane electronic system is disclosed, in which a two-dimensional array of photo-detectors receives pixel information from a scanned scene. Each pixel is observed by a plurality of detectors, and their signals are summed by time delay and integration (TDI) circuitry. The TDI circuitry comprises parallel capacitors which are charged and discharged under the control MOSFET switches. The discharge timing is such that all the detector signals representing a given pixel arrive simultaneously at a summing node. Means are included for automatically reducing the effect of anomalous detector signals on the summed output. The entire TDI system is included in a Z-type three-dimensional focal plane module.

AI hardwareH04N 25/768H04N 25/00

AI classification

AI hardware0.74
Vision0.00
Machine learning0.00
Natural language0.00
Speech0.00
Evolutionary computation0.00
Planning0.00
Knowledge representation0.00

Ownership

IRVINE SENSORS CORPORATION, A CORP. OF CA

assignment · 47050345

Assignors

ARNOLD, JACK L.

On an employer assignment, the assignors are typically the inventors.

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