CIRCUIT ARRANGEMENT FOR GENERATING A CLOCK SIGNAL WHICH IS SYNCHRONOUS IN RESPECT OF FREQUENCY TO A REFERENCE FREQUENCY

In addition to a filter phase comparator, an integrator, a first filter and a voltage-controlled oscillator of relatively low stability and having a wide pull-in range, a circuit arrangement for generating a clock signal comprises a frequency generator of high stability having a narrow pull-in range, a second phase comparator and second and third filters. The first phase comparator is supplied with the reference frequency and the clock signal emitted by the voltage-controlled oscillator. The second phase comparator is supplied with the clock signal and a normal frequency generated by a normal frequency generator. In the event of the failure of the reference frequency or the overshooting of predetermined phase difference values, a regulating circuit formed by the second phase comparator, the second filter, the third filter and the voltage-controlled oscillator is closed.