TRANSISTOR STRUCTURE FOR HIGH TEMPERATURE LOGIC CIRCUITS WITH INSULATION AROUND SOURCE AND DRAIN REGIONS

A high temperature logic field effect transistor. By surrounding the source and drain pn junctions with electrically insulative material, except where a channel runs between the source and drain, a logic field effect transistor whose on/off current ratio can still have a high value at high temperatures. The transistor can be of any standard MOS technology, such as pMOS, nMOS, or CMOS.