Patent US 4,947,482

A neural network is implemented by discrete-time, continuous voltage state analog device in which neuron, synapse and synaptic strength signals are generated in highly parallel analog circuits in successive states from stored values of the interdependent signals calculated in a previous state. The neuron and synapse signals are refined in a relaxation loop while the synaptic strength signals are held constant. In learning modes, the synaptic strength signals are modified in successive states from stable values of the analog neuron signals. The analog signals are stored for as long as required in master/slaver sample and hold circuits as digitized signals which are periodically refreshed to maintain the stored voltage within a voltage window bracketing the original analog signal.