Patent №
US 5,010,258
Granted
1991-04-23
Filed 1989
Owner
KABUSHIKI KAISHA TOSHIBA
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07406099
A programmable logic array PLA is operated under control of a single-phase clock in which a fixed current does not flow in one of an AND array and an OR array in the PLA while the other of the AND array and the OR array is precharged. Thus, this PLA can realize low consumption of electric power and a high clock frequency, thereby enabling high-speed operation.
AI classification
Ownership
KABUSHIKI KAISHA TOSHIBA
assignment · 51740913
Assignors
USAMI, KIMIYOSHI, ISHII, AYA
On an employer assignment, the assignors are typically the inventors.