INFORMATION BUFFER CONTROL SYSTEM USING BUFFER PARTITIONS AND SELECTIVE INSTRUCTION REPLACEMENT FOR PROCESSING LARGE INSTRUCTION LOOPS

To attain high execution performance of an information processor by improving hit ratio of an instruction buffer in the processor, a part of instructions comprising a loop of the instruction is allocated into the specified area of the instruction buffer and is not replaced during the execution of the loop of instruction so as to be always hit in fetching, when the size of a loop of instruction is greater than that of the instruction buffer. The other instructions are allocated into the other area and may be replaced.