MICROPROGRAM C0NTROLLED MICROPROCESSOR HAVING A SELECTIVELY EXPANDABLE INSTRUCTION CODE LENGTH INCLUDING INDEPENDENT DESCRIPTION OF OPERAND ADDRESSING AND A TYPE OF OPERATION FOR AN OPERAND BY SINGLE INSTRUCTION IN A COMMON CODING SCHEME
Patent №
US 5,117,488
Granted
1992-05-26
Filed 1988
Owner
HITACHI, LTD., 6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU, TOKYO, JAPAN, ACORP. OF JAPAN
+2 more
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07265539
In a microprocessor, a minimum instruction code length is set to a predetermined number of bits (e.g. one byte) length. One feature of the invention is that an instruction set which can selectively expand the instruction code length at a unit of the predetermined number of bits is used. Another feature is that an operand addressing mode and a type of operation for an operand are designated by separate predetermined number of code bits which are coded in a common coding scheme so that an instruction decoder is shared by those codes.
AI classification
Ownership
HITACHI, LTD., 6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU, TOKYO, JAPAN, ACORP. OF JAPAN
assignment · 49950373
HITACHI MICROCOMPUTER ENGINEERING LTD., 1479, JOSUIHONCHO, KODAIRA-SHI, TOKYO, JAPAN, A CORP. OF JAPAN
assignment · 49950373
HITACHI VLSI ENGINEERING CORPORATION, 1448, JOUSIHONCHO, KODAIRA-SHI, TOKYO, JAPAN, A CORP. OF JAPAN
assignment · 49950373
Assignors
NOGUCHI, KOUKI, TSUCHIYA, FUMIO, TSUKAMOTO, TAKASHI, MASUMURA, SHIGEKI, NAKAMURA, HIDEO, BABA, SHIRO, HAGIWARA, YOSHIMUNE
On an employer assignment, the assignors are typically the inventors.