METHOD AND A SYSTEM FOR ASSISTING MENDING OF A SEMICONDUCTOR INTEGRATED CIRCUIT, AND A WIRING STRUCTURE AND A WIRING METHOD SUITED FOR MENDING A SEMICONDUCTOR INTEGRATED CIRCUIT

A method and a system for assisting mending of an LSI after it has been formed into a chip which is necessitated by modification of logic etc. The mending includes corrections by connecting or cutting interconnections of the LSI. The assisting method and system provides a method and a system for detecting which interconnection or connections should be subjected to mending according to the logic modification, or a method and a system for detecting an area or areas where the intended mending can be carried out, or a method and a system for advising a mending-allowable rate of the LSI. This invention further provides a wiring structure suited for mending of the LSI and a wiring method for the same. By this method, a wiring structure which preliminarily has a mending area in preparation for possible modification in logic is produced.